74 search results - page 1 / 15 » Future Execution: A Hardware Prefetching Technique for Chip ... |
IEEEPACT
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Chip multiprocessors (CMPs) present a unique scenario for software data prefetching with subtle tradeoffs between memory bandwidth and performance. In a shared L2 based ...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
PDP
2010
IEEE
13 years 9 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...