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» Gate sizing with controlled displacement
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ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
13 years 9 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
DAC
2006
ACM
14 years 5 months ago
Gate sizing: finFETs vs 32nm bulk MOSFETs
FinFET devices promise to replace traditional MOSFETs because of superior ability in controlling leakage and minimizing short channel effects while delivering a strong drive curre...
Brian Swahn, Soha Hassoun
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
13 years 10 months ago
Analysis and optimization of gate leakage current of power gating circuits
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...
Hyung-Ock Kim, Youngsoo Shin
HIPEAC
2007
Springer
13 years 10 months ago
Fetch Gating Control Through Speculative Instruction Window Weighting
In a dynamic reordering superscalar processor, the front-end fetches instructions and places them in the issue queue. Instructions are then issued by the back-end execution core. T...
Hans Vandierendonck, André Seznec
ACMMSP
2005
ACM
99views Hardware» more  ACMMSP 2005»
13 years 10 months ago
Gated memory control for memory monitoring, leak detection and garbage collection
ct In the past, program monitoring often operates at the code level, performing checks at function and loop boundaries. Recent research shows that profiling analysis can identify ...
Chen Ding, Chengliang Zhang, Xipeng Shen, Mitsunor...