27 search results - page 2 / 6 » General Modeling and Technology-Mapping Technique for LUT-Ba... |
DAC
2010
ACM
13 years 9 months ago
2010
ACM
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
DAC
2005
ACM
14 years 6 months ago
2005
ACM
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
FPGA
2006
ACM
13 years 9 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...