8 search results - page 1 / 2 » Generation and Verification of Tests for Analogue Circuits S... |
DFT
1997
IEEE
13 years 9 months ago
1997
IEEE
The paper presents a test pattern generation and fault simulation methodology for the detection of catastrophic faults in analogue circuits. The test methodology chosen for evalua...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
Process variation has forever been the major fail cause of analog circuit where small deviations in component values cause large deviations in the measured output parameters. This...
DAC
2007
ACM
14 years 6 months ago
2007
ACM
Due to increased variability trends in nanoscale integrated circuits, statistical circuit analysis has become essential. We present a novel method for post-silicon analysis that g...
Publication
Within-die process variations arise during integrated circuit (IC) fabrication in the sub-100nm regime. These variations are of paramount concern as they deviate the performance of...
SIGSOFT
2007
ACM
14 years 5 months ago
2007
ACM
The testing of the performance of opportunistic communication protocols and applications is usually done through simulation as i) deployments are expensive and should be left to t...