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DATE
2006
IEEE
89views Hardware» more  DATE 2006»
13 years 11 months ago
Generation of broadside transition fault test sets that detect four-way bridging faults
Generation of n -detection test sets is typically done for a single fault model. In this work we investigate the generation of n -detection test sets by pairing each fault of a ta...
Irith Pomeranz, Sudhakar M. Reddy
DFT
2003
IEEE
98views VLSI» more  DFT 2003»
13 years 10 months ago
Constrained ATPG for Broadside Transition Testing
In this paper, we propose a new concept of testing only functionally testable transition faults in Broadside Transition testing via a novel constrained ATPG. For each functionally...
Xiao Liu, Michael S. Hsiao
ITC
1999
IEEE
103views Hardware» more  ITC 1999»
13 years 9 months ago
Resistive bridge fault modeling, simulation and test generation
Resistive bridging faults in combinational CMOS circuits are studied in this work. Circuit-level models are ed to voltage behavior for use in voltage-level fault simulation and te...
Vijay R. Sar-Dessai, D. M. H. Walker
DATE
2003
IEEE
98views Hardware» more  DATE 2003»
13 years 10 months ago
On the Characterization of Hard-to-Detect Bridging Faults
We investigate a characterization of hard-to-detect bridging faults. For circuits with large numbers of lines (or nodes), this characterization can be used to select target faults...
Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
13 years 8 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee