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ICCAD
1992
IEEE
91views Hardware» more  ICCAD 1992»
13 years 9 months ago
HYPER-LP: a system for power minimization using architectural transformations
Anantha Chandrakasan, Miodrag Potkonjak, Jan M. Ra...
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
13 years 11 months ago
Minimal activity mixed-signal VLSI architecture for real-time linear transforms in video
Abstract— The mixed-signal processor performs digital vectormatrix multiplication using internally analog fine-grain parallel computing. The three-transistor CID/DRAM unit cell ...
Rafal Karakiewicz, Roman Genov
DAC
1999
ACM
13 years 9 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ISVLSI
2006
IEEE
150views VLSI» more  ISVLSI 2006»
13 years 11 months ago
Design and Analysis of a Low Power VLIW DSP Core
Power consumption has been the primary issue in processor design, with various power reduction strategies being adopted from system-level to circuitlevel. In order to develop a po...
Chan-Hao Chang, Diana Marculescu
DAC
1997
ACM
13 years 9 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...