222 search results - page 3 / 45 » Hardware based frequency voltage control of voltage frequenc... |
ISCAS
2008
IEEE
14 years 12 days ago
2008
IEEE
—A simple low-area and low-power clock frequency multiplier is proposed for Delay Locked Loop (DLL) based clock synthesizers. In this circuit, 2n voltage controlled delay lines (...
ICCAD
2004
IEEE
14 years 2 months ago
2004
IEEE
Abstract—The slack time in real-time systems can be used by recovery schemes to increase system reliability as well as by frequency and voltage scaling techniques to save energy....
MICRO
2002
IEEE
13 years 11 months ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
ASPDAC
2005
ACM
13 years 8 months ago
2005
ACM
Due to increasing clock speeds and shrinking technologies, distributing a single global clock signal throughout a chip is becoming a difficult and challenging proposition. In this...