249 search results - page 3 / 50 » High Level Synthesis of Timed Asynchronous Circuits |
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
ASYNC
2003
IEEE
13 years 10 months ago
2003
IEEE
We present the design of a high performance on-chip pipelined asynchronous DRAM suitable for use in a microprocessor cache. Although traditional DRAM structures suffer from long a...
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
EVOW
2001
Springer
13 years 9 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
Interest in asynchronous circuit design is increasing due to its promise of efficient designs. The quiescent nature of asynchronous circuits allows them to remain in a stable stat...