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» High throughput 2D DCT IDCT processor for video coding
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ICIP
2005
IEEE
14 years 6 months ago
High throughput 2D DCT/IDCT processor for video coding
This paper describes the architecture of an 8x8 2-D DCT/IDCT processor with high throughput, reduced hardware, and a parallel-pipeline scheme. This architecture allows the process...
Gustavo A. Ruiz, Juan A. Michell, Angel M. Buron
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
13 years 10 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
TIP
1998
240views more  TIP 1998»
13 years 4 months ago
DCT-based motion estimation
—We propose novel discrete cosine transform (DCT) pseudophase techniques to estimate shift/delay between two onedimensional (1-D) signals directly from their DCT coefficients by...
Ut-Va Koc, K. J. Ray Liu