10 search results - page 2 / 2 » High-Bandwidth Packet Switching on the Raw General-Purpose A... |
CCR
2006
13 years 5 months ago
2006
We describe a system in which layer 2 switching is placed directly under the control of layer 3 routing protocols on a hop-by-hop basis. Specifically, ATM switching is controlled ...
PDP
2010
IEEE
13 years 11 months ago
2010
IEEE
— Due to the multi-core processors, the importance of parallel workloads has increased considerably. However, manycore chips demand new interconnection strategies, since traditio...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
ACSC
2003
IEEE
13 years 10 months ago
2003
IEEE
Clusters of commodity machines have become a popular way of building cheap high performance parallel computers. Many of these designs rely on standard Ethernet networks as a syste...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...