8 search results - page 1 / 2 » High-Level Allocation to Minimize Internal Hardware Wastage |
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
DAC
1989
ACM
13 years 9 months ago
1989
ACM
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
Abstract— This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable ...
ASPDAC
2001
ACM
13 years 9 months ago
2001
ACM
- This paper presents encoding techniques to optimize the switching activity on a multiplexed DRAM address bus. The DRAM switching activity can be classified either as external (be...