17 search results - page 2 / 4 » High-Radix Implementation of IEEE Floating-Point Addition |
ARITH
2009
IEEE
14 years 17 days ago
2009
IEEE
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
ARITH
1999
IEEE
13 years 10 months ago
1999
IEEE
An extension of the very-high radix division with prescaling and selection by rounding is presented. This extension consists in increasing the effective radix of the implementatio...
ARITH
2009
IEEE
14 years 17 days ago
2009
IEEE
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
ARITH
2007
IEEE
14 years 3 days ago
2007
IEEE
The draft revision of the IEEE Standard for FloatingPoint Arithmetic (IEEE P754) includes a definition for decimal floating-point (FP) in addition to the widely used binary FP s...
ASAP
2005
IEEE
13 years 11 months ago
2005
IEEE
With continued reductions in feature size, additional functionality may be added to future microprocessors to boost the performance of important application domains. Due to growth...