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» Hyperelliptic Curve Coprocessors on a FPGA
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ARC
2009
Springer
165views Hardware» more  ARC 2009»
14 years 3 days ago
Optimizing the Control Hierarchy of an ECC Coprocessor Design on an FPGA Based SoC Platform
Abstract. Most hardware/software codesigns of Elliptic Curve Cryptography only have one central control unit, typically a 32 bit or 8 bit processor core. With the ability of integr...
Xu Guo, Patrick Schaumont
FPL
2005
Springer
127views Hardware» more  FPL 2005»
13 years 10 months ago
Fast FPGA Placement using Space-filling Curve
In this paper, we propose a placement method for islandstyle FPGAs, based on recursive bi-partitioning followed by application of space-filling curves. Experimental results of ou...
Pritha Banerjee, Subhasis Bhattacharjee, Susmita S...
ISCAS
2006
IEEE
102views Hardware» more  ISCAS 2006»
13 years 11 months ago
A fast dual-field modular arithmetic logic unit and its hardware implementation
— We propose a fast Modular Arithmetic Logic Unit (MALU) that is scalable in the digit size (d) and the field size (k). The datapath of MALU has chains of Carry Save Adders (CSA...
Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede
CEE
2007
110views more  CEE 2007»
13 years 5 months ago
HW/SW co-design for public-key cryptosystems on the 8051 micro-controller
It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid...