18 search results - page 2 / 4 » IP Reuse in the System on a Chip Era |
ISQED
2005
IEEE
13 years 11 months ago
2005
IEEE
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...
ISPD
2011
ACM
12 years 8 months ago
2011
ACM
Three-dimensional ICs promise to significantly extend the scale of system integration and facilitate new-generation electronics. However, progress in commercial 3D ICs has been s...
ISQED
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper addresses a low-cost and real-time solution for the implementation of super-resolution (SR) algorithms over SOC (System-On-Chip) platforms in order to achieve high-qual...
ACSD
2004
IEEE
13 years 9 months ago
2004
IEEE
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc s...
ICCAD
2000
IEEE
13 years 9 months ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...