305 search results - page 2 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
NOCS
2010
IEEE
13 years 3 months ago
2010
IEEE
Router microarchitecture plays a central role in the performance of an on-chip network (NoC). Buffers are needed in routers to house incoming flits which cannot be immediately forw...
CASES
2008
ACM
13 years 7 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
NOCS
2007
IEEE
13 years 12 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
ISCA
2008
IEEE
14 years 4 hour ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...