20 search results - page 2 / 4 » Impact of lithography-friendly circuit layout |
DAC
2004
ACM
13 years 11 months ago
2004
ACM
Aggressive design cycles in the semiconductor industry demand a design-reuse principle for analog circuits. The strong impact of layout intricacies on analog circuit performance n...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
Gate oxide tunneling current (Igate) is emerging as a key roadblock for device scaling in nanometer-scale CMOS circuits. A practical means to reduce Igate is to leverage dual Tox ...
SLIP
2009
ACM
14 years 3 days ago
2009
ACM
New technologies such as 3D integration are becoming a new force that is keeping Moore’s law in effect in today’s nano era. By adding a third dimension in current 2D circuits...
DAC
2004
ACM
14 years 6 months ago
2004
ACM
Variability of circuit performance is becoming a very important issue for ultra-deep sub-micron technology. Gate length variation has the most direct impact on circuit performance...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...