16 search results - page 2 / 4 » Implementation of Concurrent Checking Circuits by Independen... |
DFT
2008
IEEE
13 years 11 months ago
2008
IEEE
The paper presents a new technique for designing a concurrently checking combinational circuit. The technique is based on partitioning the circuit into two independent sub-circuit...
FTCS
1994
13 years 6 months ago
1994
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
FMCAD
2004
Springer
13 years 10 months ago
2004
Springer
This paper describes a new method that is useful in combinational equivalence checking with very challenging industrial designs. The method does not build a miter; instead it build...
EUROMICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
IOLTS
2005
IEEE
13 years 10 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...