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» Implementation of Highly Available OSPF Router on ATCA
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HOTI
2005
IEEE
13 years 10 months ago
Design of Randomized Multichannel Packet Storage for High Performance Routers
High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity ...
Sailesh Kumar, Patrick Crowley, Jonathan S. Turner
FCCM
2009
IEEE
123views VLSI» more  FCCM 2009»
13 years 8 months ago
Scalable High Throughput and Power Efficient IP-Lookup on FPGA
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
Hoang Le, Viktor K. Prasanna
CN
2002
77views more  CN 2002»
13 years 4 months ago
Architecture of a Web server accelerator
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
Junehwa Song, Arun Iyengar, Eric Levy-Abegnoli, Da...
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
13 years 11 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
PADS
2005
ACM
13 years 10 months ago
Simulating Realistic Packet Routing without Routing Protocols
A fundamental requirement for any network simulation environment is the realistic forwarding of packets from a source to a destination in the simulated topology. The routing decis...
George F. Riley, Dheeraj Reddy