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» Improved Fault Emulation for Synchronous Sequential Circuits
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CF
2004
ACM
13 years 11 months ago
Designing and testing fault-tolerant techniques for SRAM-based FPGAs
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
Fernanda Lima Kastensmidt, Gustavo Neuberger, Luig...
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
13 years 10 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
SPIN
2000
Springer
13 years 9 months ago
Communication Topology Analysis for Concurrent Programs
Abstract. In this article, we address the problem of statically determining an approximation of the communication topology of concurrent programs. These programs may contain dynami...
Matthieu Martel, Marc Gengler
IEEEPACT
2008
IEEE
14 years 5 days ago
Skewed redundancy
Technology scaling in integrated circuits has consistently provided dramatic performance improvements in modern microprocessors. However, increasing device counts and decreasing o...
Gordon B. Bell, Mikko H. Lipasti