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ARCS
2009
Springer
13 years 11 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
EUROMICRO
1998
IEEE
13 years 9 months ago
Improved Multimedia Server I/O Subsystems
The main function of a continuous media server is to concurrently stream data from storage to multiple clients over a network. The resulting streams will congest the host CPU bus,...
Michael Weeks, Hadj Batatia, Reza Sotudeh
HPCC
2005
Springer
13 years 10 months ago
Memory Subsystem Characterization in a 16-Core Snoop-Based Chip-Multiprocessor Architecture
In this paper we present an exhaustive evaluation of the memory subsystem in a chip-multiprocessor (CMP) architecture composed of 16 cores. The characterization is performed making...
Francisco J. Villa, Manuel E. Acacio, José ...
ISVLSI
2007
IEEE
204views VLSI» more  ISVLSI 2007»
13 years 11 months ago
Designing Memory Subsystems Resilient to Process Variations
As technology scales, more sophisticated fabrication processes cause variations in many different parameters in the device. These variations could severely affect the performance ...
Mahmoud Ben Naser, Yao Guo, Csaba Andras Moritz
TDSC
2008
102views more  TDSC 2008»
13 years 4 months ago
Temporal Partitioning of Communication Resources in an Integrated Architecture
Integrated architectures in the automotive and avionic domain promise improved resource utilization and enable a better coordination of application subsystems compared to federated...
Roman Obermaisser