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MICRO
2009
IEEE
121views Hardware» more  MICRO 2009»
13 years 11 months ago
Improving memory bank-level parallelism in the presence of prefetching
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N...
SIGMETRICS
1998
ACM
112views Hardware» more  SIGMETRICS 1998»
13 years 9 months ago
Implementing Cooperative Prefetching and Caching in a Globally-Managed Memory System
This paper presents cooperative prefetching and caching — the use of network-wide global resources (memories, CPUs, and disks) to support prefetching and caching in the presence...
Geoffrey M. Voelker, Eric J. Anderson, Tracy Kimbr...
ICS
2010
Tsinghua U.
13 years 7 months ago
Timing local streams: improving timeliness in data prefetching
Data prefetching technique is widely used to bridge the growing performance gap between processor and memory. Numerous prefetching techniques have been proposed to exploit data pa...
Huaiyu Zhu, Yong Chen, Xian-He Sun
HPCA
2009
IEEE
14 years 5 months ago
Feedback mechanisms for improving probabilistic memory prefetching
This paper presents three techniques for improving the effectiveness of the recently proposed Adaptive Stream Detection (ASD) prefetching mechanism. The ASD prefetcher is a standa...
Ibrahim Hur, Calvin Lin
CCGRID
2010
IEEE
13 years 3 months ago
An Adaptive Data Prefetcher for High-Performance Processors
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
Yong Chen, Huaiyu Zhu, Xian-He Sun