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» Improving over-the-cell channel routing in standard cell des...
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ICCAD
2009
IEEE
109views Hardware» more  ICCAD 2009»
13 years 3 months ago
CRISP: Congestion reduction by iterated spreading during placement
Dramatic progress has been made in algorithms for placement and routing over the last 5 years, with improvements in both speed and quality. Combining placement and routing into a ...
Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam,...
ISPD
2012
ACM
289views Hardware» more  ISPD 2012»
12 years 1 months ago
Keep it straight: teaching placement how to better handle designs with datapaths
As technology scales and frequency increases, a new design style is emerging, referred to as hybrid designs, which contain a mixture of random logic and datapath standard cell com...
Samuel I. Ward, Myung-Chul Kim, Natarajan Viswanat...
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
13 years 11 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...
MOBISYS
2004
ACM
14 years 5 months ago
Improving the Latency of 802.11 hand-offs using Neighbor Graphs
The 802.11 IEEE Standard has enabled low cost and effective wireless LAN services (WLAN). With the sales and deployment of WLAN based networks exploding, many people believe that ...
Minho Shin, Arunesh Mishra, William A. Arbaugh
ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
13 years 3 months ago
A low latency wormhole router for asynchronous on-chip networks
Asynchronous on-chip networks are power efficient and tolerant to process variation but they are slower than synchronous on-chip networks. A low latency asynchronous wormhole route...
Wei Song, Doug Edwards