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COMPUTE
2010
ACM
13 years 9 months ago
Performance evaluation of speculation-based protocol for read-only transactions
In the literature, speculation-based protocols have been proposed to improve the performance of read-only transactions (ROTs) over the existing two-phase locking (2PL) and snapsho...
Thirumalaisamy Ragunathan, P. Krishna Reddy
HIPEAC
2009
Springer
13 years 10 months ago
Steal-on-Abort: Improving Transactional Memory Performance through Dynamic Transaction Reordering
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
Mohammad Ansari, Mikel Luján, Christos Kots...
VLDB
2005
ACM
113views Database» more  VLDB 2005»
13 years 10 months ago
Optimistic Intra-Transaction Parallelism on Chip Multiprocessors
With the advent of chip multiprocessors, exploiting intra-transaction parallelism is an attractive way of improving transaction performance. However, exploiting intra-transaction ...
Christopher B. Colohan, Anastassia Ailamaki, J. Gr...
MICRO
1997
IEEE
108views Hardware» more  MICRO 1997»
13 years 9 months ago
Improving the Accuracy and Performance of Memory Communication Through Renaming
As processors continue to exploit more instruction level parallelism, a greater demand is placed on reducing the e ects of memory access latency. In this paper, we introduce a nov...
Gary S. Tyson, Todd M. Austin
CODES
2011
IEEE
12 years 5 months ago
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R....