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ICCD
2004
IEEE
101views Hardware» more  ICCD 2004»
14 years 1 months ago
Increasing Processor Performance Through Early Register Release
Modern superscalar microprocessors need sizable register files to support large number of in-flight instructions for exploiting ILP. An alternative to building large register file...
Oguz Ergin, Deniz Balkan, Dmitry V. Ponomarev, Kan...
IEEEPACT
2005
IEEE
13 years 10 months ago
Compiler Directed Early Register Release
This paper presents a novel compiler directed technique to reduce the register pressure and power of the register file by releasing registers early. The compiler identifies regi...
Timothy M. Jones, Michael F. P. O'Boyle, Jaume Abe...
ACSC
2004
IEEE
13 years 8 months ago
Reducing Register Pressure Through LAER Algorithm
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
Gao Song
ICS
2007
Tsinghua U.
13 years 11 months ago
An L2-miss-driven early register deallocation for SMT processors
The register file is one of the most critical datapath components limiting the number of threads that can be supported on a Simultaneous Multithreading (SMT) processor. To allow t...
Joseph J. Sharkey, Dmitry V. Ponomarev
JILP
2000
109views more  JILP 2000»
13 years 4 months ago
Dynamic Register Renaming Through Virtual-Physical Registers
Register file access time represents one of the critical delays of current microprocessors, and it is expected to become more critical as future processors increase the instructio...
Teresa Monreal, Antonio González, Mateo Val...