54 search results - page 1 / 11 » Incremental Circuit Simulation Using Waveform Relaxation |
DAC
1992
ACM
13 years 9 months ago
1992
ACM
TCAD
1998
13 years 4 months ago
1998
In this paper, we present a probabilistic simulation technique to estimate the power consumption of a cmos circuit under a general delay model. This technique is based on the noti...
ASPDAC
1999
ACM
13 years 9 months ago
1999
ACM
ISLPED
1996
ACM
13 years 9 months ago
1996
ACM
We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions...
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...