Gate-level current waveform simulation of CMOS integrated circuits

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We present a new gate-level approach to current simulation. We use a symbolic model of current pulses that takes accurately into account the dependence on the switching conditions. We then construct current waveforms during eventdriven logic simulation by means of pulse composition. We obtain satisfying accuracy on time-domain current waveforms and on peak current estimates, while maintaining performance comparable with traditional gate-level simulation.

Alessandro Bogliolo, Luca Benini, Giovanni De Mich

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Current Simulation | Current Waveforms | Hardware | ISLPED 1996 | Time-domain Current Waveforms |

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Added	08 Aug 2010
Updated	08 Aug 2010
Type	Conference
Year	1996
Where	ISLPED
Authors	Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò

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Gate-level current waveform simulation of CMOS integrated circuits

Current Simulation | Current Waveforms | Hardware | ISLPED 1996 | Time-domain Current Waveforms |

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