54 search results - page 3 / 11 » Incremental Circuit Simulation Using Waveform Relaxation |
ITC
1996
IEEE
13 years 10 months ago
1996
IEEE
A novel approach to testing CMOS digital circuits is presented that is based on an analysis of IDD switching transients on the supply rails and voltage transients at selected test...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
DAC
2005
ACM
13 years 7 months ago
2005
ACM
On-chip supply networks are playing an increasingly important role for modern nanometer-scale designs. However, the ever growing sizes of power grids make the analysis problem ext...
BCS
2008
13 years 7 months ago
2008
Digital circuits with feedback loops can solve some instances of NP-hard problems by relaxation: the circuit will either oscillate or settle down to a stable state that represents...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
We extend the subsequence removal technique to provide signi cantly higher static compaction for sequential circuits. We show that state relaxation techniques can be used to ident...