24 search results - page 5 / 5 » Influence of Leakage Reduction Techniques on Delay Leakage U... |
ICCD
2005
IEEE
14 years 2 months ago
2005
IEEE
: Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications. Operand isolation schemes are adopted to reduce...
GLVLSI
2002
IEEE
13 years 10 months ago
2002
IEEE
A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active...
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper presents a minimum area, low-power driven clustering algorithm for coarse-grained, antifuse-based FPGAs under delay constraints. The algorithm accurately predicts logic...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...