27 search results - page 2 / 6 » Integrated placement and skew optimization for rotary clocki... |
DAC
2010
ACM
13 years 9 months ago
2010
ACM
Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can ...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
: In ultra-deep submicron VLSI circuits, clock network is a major source of power consumption and power supply noise. Therefore, it is very important to minimize clock network size...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
VLSID
2007
IEEE
14 years 17 hour ago
2007
IEEE
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...