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» Integrated power supply planning and floorplanning
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ASPDAC
2001
ACM
75views Hardware» more  ASPDAC 2001»
13 years 8 months ago
Integrated power supply planning and floorplanning
One of the most challenging issues in today's high-performance VLSI design is to ensure high-quality power supply to each individual circuit blocks. Reduced power supply volt...
I-Min Liu, Hung-Ming Chen, Tan-Li Chou, Adnan Aziz...
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hs...
ISCAS
2003
IEEE
113views Hardware» more  ISCAS 2003»
13 years 10 months ago
Tile-graph-based power planning
In this paper, we introduce a tile-graph-based approach to power planning. For a given flooplan solution, the power inputs are modeled into a tile graph, the minimum capacity of e...
Jyh Perng Fang, Sao Jie Chen
ASPDAC
2007
ACM
109views Hardware» more  ASPDAC 2007»
13 years 9 months ago
On Increasing Signal Integrity with Minimal Decap Insertion in Area-Array SoC Floorplan Design
Abstract-- With technology further scaling into deep submicron era, power supply noise become an important problem. Power supply noise problem is getting worse due to serious IR-dr...
Chao-Hung Lu, Hung-Ming Chen, Chien-Nan Jimmy Liu