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ICS
2011
Tsinghua U.
12 years 8 months ago
Predictive coordination of multiple on-chip resources for chip multiprocessors
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
Jian Chen, Lizy Kurian John
CASES
2006
ACM
13 years 10 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
HAPTICS
2006
IEEE
13 years 10 months ago
A Sensitive Skin Based on Touch-Area-Evaluating Tactile Elements
In this paper, we propose a new tactile sensor skin system. The system consists of two components. One is a sensor element which detects a contact area in addition to a contact fo...
Takayuki Hoshi, Hiroyuki Shinoda
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
13 years 8 months ago
Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach
Future Systems-on-Chips will include multiple heterogeneous processing units, with complex data-dependent shared resource access patterns dictating the performance of a design. Cu...
Alex Bobrek, Joshua J. Pieper, Jeffrey E. Nelson, ...
CF
2010
ACM
13 years 9 months ago
Load balancing using dynamic cache allocation
Supercomputers need a huge budget to be built and maintained. To maximize the usage of their resources, application developers spend time to optimize the code of the parallel appl...
Miquel Moretó, Francisco J. Cazorla, Rizos ...