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TVLSI
2010
12 years 11 months ago
Accurate Predictive Interconnect Modeling for System-Level Design
Luca P. Carloni, Andrew B. Kahng, Sudhakar Muddu, ...
ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
3DIC
2009
IEEE
146views Hardware» more  3DIC 2009»
13 years 11 months ago
A routerless system level interconnection network for 3D integrated systems
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
Kelli Ireland, Donald M. Chiarulli, Steven P. Levi...
ISQED
2006
IEEE
94views Hardware» more  ISQED 2006»
13 years 11 months ago
System-Level SRAM Yield Enhancement
It is well known that SRAM constitutes a large portion of modern integrated circuits, with 80% or more of the total transistors being dedicated to SRAM in a typical processor or S...
Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park...
MASCOTS
2003
13 years 6 months ago
System-Level Simulation Modeling with MLDesigner
System-level design presents special simulation modeling challenges. System-level models address the architectural and functional performance of complex systems. Systems are decom...
Gunar Schorcht, Ian A. Troxel, Keyvan Farhangian, ...