13 search results - page 2 / 3 » Interconnect parasitic extraction in the digital IC design m... |
TVLSI
2002
13 years 4 months ago
2002
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of thes...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
3DIC
2009
IEEE
14 years 20 hour ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...