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ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Frequency Selective Model Order Reduction via Spectral Zero Projection
As process technology continues to scale into the nanoscale regime, interconnect plays an ever increasing role in determining VLSI system performance. As the complexity of these sy...
Mehboob Alam, Arthur Nieuwoudt, Yehia Massoud
ASPDAC
2008
ACM
106views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Hierarchical Krylov subspace reduced order modeling of large RLC circuits
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Duo Li, Sheldon X.-D. Tan
DAC
1999
ACM
13 years 9 months ago
Model Order-Reduction of RC(L) Interconnect Including Variational Analysis
As interconnect feature sizes continue to scale to smaller dimensions, long interconnect can dominate the IC timing performance, but the interconnect parameter variations make it ...
Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas
CCGRID
2008
IEEE
13 years 7 months ago
Using Probabilistic Characterization to Reduce Runtime Faults in HPC Systems
Abstract--The current trend in high performance computing is to aggregate ever larger numbers of processing and interconnection elements in order to achieve desired levels of compu...
Jim M. Brandt, Bert J. Debusschere, Ann C. Gentile...
ASPDAC
2010
ACM
120views Hardware» more  ASPDAC 2010»
13 years 3 months ago
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method
In this paper, we propose a new wideband model order reduction method for interconnect circuits by using a novel adaptive sampling and error estimation scheme. We try to address t...
Hai Wang, Sheldon X.-D. Tan, Gengsheng Chen