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MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
10 years 11 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
11 years 7 months ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
ISCA
2006
IEEE
123views Hardware» more  ISCA 2006»
11 years 1 months ago
A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
DAC
2004
ACM
11 years 5 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
CASES
2007
ACM
11 years 5 months ago
Light-weight synchronization for inter-processor communication acceleration on embedded MPSoCs
Advances in semiconductor technologies have placed MPSoCs center stage as a standard architecture for embedded applications of ever increasing complexity. Efficient utilization of...
Chengmo Yang, Alex Orailoglu
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