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» Is Time Ripe for Fabric on a Chip
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DAC
1999
ACM
14 years 5 months ago
Converting a 64b PowerPC Processor from CMOS Bulk to SOI Technology
A 550MHz 64b PowerPC processor was developed for fabrication in Silicon-On-Insulator (SOI) technology from a processor previously designed and fabricated in bulk CMOS [1]. Both th...
D. Allen, D. Behrends, B. Stanisic
DFT
2005
IEEE
103views VLSI» more  DFT 2005»
13 years 10 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
DAC
2002
ACM
14 years 5 months ago
The next chip challenge: effective methods for viable mixed technology SoCs
The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoC...
H. Bernhard Pogge
CISIS
2009
IEEE
13 years 11 months ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
TE
2010
119views more  TE 2010»
12 years 11 months ago
Innovative Teaching of IC Design and Manufacture Using the Superchip Platform
This paper describes how an intelligent chip architecture has allowed a large cohort of undergraduate students to be given effective practical insight into IC design, by designing ...
Peter R. Wilson, Reuben Wilcock, Iain McNally, Mat...