28 search results - page 4 / 6 » Iterative remapping for logic circuits |
ASPDAC
2007
ACM
13 years 10 months ago
2007
ACM
ound in BMC by Combining Constant Propagation and Abstraction Roy Armoni, Limor Fix1 , Ranan Fraer1 , Tamir Heyman1,3 , Moshe Vardi2 , Yakir Vizel1 , Yael Zbar1 1 Logic and Validat...
DATE
2009
IEEE
14 years 21 days ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
ITC
1995
IEEE
13 years 9 months ago
1995
IEEE
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...
ICCTA
2007
IEEE
13 years 9 months ago
2007
IEEE
In this paper, we propose a placement method for islandstyle FPGAs, based on fast yet very good initial placement followed by refinement using ultra-low temperature Simulated Anne...
GLVLSI
2007
IEEE
14 years 8 days ago
2007
IEEE
Compact realizations of reversible logic functions are of interest in the design of quantum computers. Such reversible functions are realized as a cascade of Toffoli gates. In th...