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» Latency Minimization for Synchronous Data Flow Graphs
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DAC
1997
ACM
13 years 10 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
DAM
2008
72views more  DAM 2008»
13 years 6 months ago
Minimization of circuit registers: Retiming revisited
In this paper, we address the following problem: given a synchronous digital circuit, is it possible to construct a new circuit computing the same function as the original one but...
Bruno Gaujal, Jean Mairesse
ISSS
1996
IEEE
114views Hardware» more  ISSS 1996»
13 years 10 months ago
Flow Graph Balancing for Minimizing the Required Memory Bandwidth
In this paper we present the problem of flow graph balancing for minimizingthe required memory bandwidth. Our goal is to minimize the required memory bandwidth within the given cy...
Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, ...
CATA
2007
13 years 7 months ago
Static Scheduling for Synchronous Data Flow Graphs
This paper addresses the issue of determining the iteration bound for a synchronous data flow graph (SDFG) and determining whether or not a SDFG is live based on some calculations...
Samer F. Khasawneh, Michael E. Richter, Timothy W....
FMCAD
2006
Springer
13 years 9 months ago
Liveness and Boundedness of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) have proven to be suitable for specifying and analyzing streaming applications that run on single- or multi-processor platforms. Streaming appl...
Amir Hossein Ghamarian, Marc Geilen, Twan Basten, ...