18 search results - page 1 / 4 » Layout-Driven RTL Binding Techniques for High-Level Synthesi... |
ISSS
1996
IEEE
13 years 9 months ago
1996
IEEE
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
TVLSI
2008
13 years 4 months ago
2008
Much effort in register transfer level (RTL) design has been devoted to developing "push-button" types of tools. However, given the highly complex nature, and lack of con...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
This paper presents a design methodology, called common-case computation (CCC), and new design automation algorithms for optimizing power consumption or performance. The proposed ...
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...