4 search results - page 1 / 1 » Leakage Reduction at the Architectural Level and Its Applica... |
PATMOS
2004
Springer
13 years 10 months ago
2004
Springer
DAC
2005
ACM
13 years 6 months ago
2005
ACM
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
ACSAC
2000
IEEE
13 years 9 months ago
2000
IEEE
The performance of RSA hardware is primarily determined by an efficient implementation of the long integer modular arithmetic and the ability to utilize the Chinese Remainder The...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...