63 search results - page 2 / 13 » Local Search for Final Placement in VLSI Design |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
EH
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper describes a multi-objective Evolutionary Algorithm (EA) system for the synthesis of efficient non-linear VLSI circuit modules. The EA takes the specification for a no...
GLVLSI
2007
IEEE
13 years 5 months ago
2007
IEEE
Given a set of placed blocks, we present an algorithm that minimally spaces the blocks to ensure routability under several assumptions. By performing a binary search on total widt...
DAC
2010
ACM
13 years 6 months ago
2010
ACM
This work proposes a new problem of identifying large and tangled logic structures in a synthesized netlist. Large groups of cells that are highly interconnected to each other can...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
In floorplan design, it is common that a designer will want to control the positions of some modules in the final packing for various purposes like data path alignment, I/O connec...