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VLSID
2007
IEEE
152views VLSI» more  VLSID 2007»
14 years 5 months ago
An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect
With scaling of CMOS technologies, sub-threshold, gate and reverse biased junction band-to-band-tunneling leakage have increased dramatically. Together they account for more than 2...
Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip K...
ICCAD
2007
IEEE
98views Hardware» more  ICCAD 2007»
14 years 1 months ago
Device-circuit co-optimization for mixed-mode circuit design via geometric programming
Modern processing technologies offer a number of types of devices such as high-VT , low-VT , thick-oxide, etc. in addition to the nominal transistor in order to meet system perfor...
Jintae Kim, Ritesh Jhaveri, Jason Woo, Chih-Kong K...
IJCSS
2007
133views more  IJCSS 2007»
13 years 4 months ago
Synthesis of Read-Once Digital Hardware with Reduced Energy Delay Product
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
P. Balasubramanian, S. Theja
CASES
2006
ACM
13 years 10 months ago
Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...
Mark Hempstead, Gu-Yeon Wei, David Brooks
ASPDAC
2004
ACM
130views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Automatic process migration of datapath hard IP libraries
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...
Fang Fang, Jianwen Zhu