45 search results - page 9 / 9 » Low power techniques for address encoding and memory allocat... |
GLVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
As the desire of scientists to perform ever larger computations drives the size of today’s high performance computers from hundreds, to thousands, and even tens of thousands of ...
ISCA
2007
IEEE
13 years 11 months ago
2007
IEEE
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
ICITA
2005
IEEE
13 years 10 months ago
2005
IEEE
With the increasing popularity of mobile computing platforms such as personal digital assistants (PDAs) and smart mobile phones, applications originally designed for higherperform...
BMCBI
2010
13 years 5 months ago
2010
Background: Recent biological discoveries have shown that clustering large datasets is essential for better understanding biology in many areas. Spectral clustering in particular ...