In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
Valavan Manohararajah, Stephen Dean Brown, Zvonko ...