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» Maximum Current Estimation in Programmable Logic Arrays
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ASPDAC
2005
ACM
93views Hardware» more  ASPDAC 2005»
13 years 8 months ago
Power minimization for dynamic PLAs
—Dynamic programmable logic arrays (PLAs) which are built of the NOR–NOR structure, have been very popular in high performance design because of their high-speed and predictabl...
Tzyy-Kuen Tien, Chih-Shen Tsai, Shih-Chieh Chang, ...
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
13 years 10 months ago
A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms
An accurate model is presented to calculate the short circuit energy dissipation of logic cells. The short circuit current is highly dependent on the input and output voltage valu...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
IJCAI
1989
13 years 7 months ago
A Critique of the Valiant Model
This paper considers the Valiant framework as it is applied to the task of learning logical concepts from random examples. It is argued that the current interpretation of this Val...
Wray L. Buntine
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
13 years 11 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
13 years 11 months ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck