3 search results - page 1 / 1 » Measurement and characterization of pattern dependent proces... |
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
Process variations have become a serious concern for nanometer technologies. The interconnect and device variations include interand intra-die variations of geometries, as well as...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
The inductance effects become significant for sub-100nm process designs due to increasing interconnect lengths, lower interconnect resistance values and fast signal transition tim...
3DIC
2009
IEEE
14 years 4 days ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...