16 search results - page 2 / 4 » Methodology and Tools for State Encoding in Asynchronous Cir... |
ASPDAC
2001
ACM
13 years 9 months ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
ICCAD
1999
IEEE
13 years 10 months ago
1999
IEEE
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
ASYNC
2000
IEEE
13 years 10 months ago
2000
IEEE
New design technologies rely on truly reusable IP blocks with simple means of assembly. Asynchronous methodologies could be a promising option to implement these requirements. Pro...
ACSD
2007
IEEE
13 years 9 months ago
2007
IEEE
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, ...
ICCAD
1993
IEEE
13 years 10 months ago
1993
IEEE
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...