8 search results - page 1 / 2 » Microarchitecture-Based Introspection: A Technique for Trans... |
DSN
2005
IEEE
13 years 6 months ago
2005
IEEE
The increasing transient fault rate will necessitate onchip fault tolerance techniques in future processors. The speed gap between the processor and the memory is also increasing,...
DSN
2007
IEEE
13 years 11 months ago
2007
IEEE
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
DFT
2003
IEEE
13 years 10 months ago
2003
IEEE
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
ISCAPDCS
2001
13 years 6 months ago
2001
In this paper, we propose a fault-tolerant mechanism for microprocessors, which detects transient faults and recovers from them. There are two driving force to investigate fault-t...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Future microprocessors will be highly susceptible to transient errors as the sizes of transistors decrease due to CMOS scaling. Prior techniques advocated full scale structural or...