128 search results - page 2 / 26 » Microprocessor Based Testing for Core-Based System on Chip |
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
DAC
1999
ACM
14 years 5 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
ATS
2003
IEEE
13 years 10 months ago
2003
IEEE
DFT
2003
IEEE
13 years 10 months ago
2003
IEEE
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...