IC inductance extraction generally produces either port inductances based on simplified current path assumptions or a complete partial inductance matrix. Combining either of thes...
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
As interconnect feature sizes continue to scale to smaller dimensions, long interconnect can dominate the IC timing performance, but the interconnect parameter variations make it ...
Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas
Numerous approaches have been proposed to address the overwhelming modeling problems that result from the emergence of magnetic coupling as a dominant performance factor for ICs a...
— Clock meshes posses inherent low clock skews and excellent immunity to PVT variations, and have increasingly found their way to high-performance IC designs. However, analysis o...
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jia...